Ultra-high power ZVS+ZCS integrated soft swithing DC/DC converter

ABSTRACT

A ultra-high power ZVS+ZCS integrated soft switching DC/DC converter is disclosed, which adopts a phase shifted full bridge ZVS (zero voltage switching) DC/DC converter circuit. A saturation inductance L k =L k1 +L k2  controlled by a load current is series connected to a primary side of a high permeability ring transformer. A RCD buffer circuit for ZCS (zero voltage switching) current zero-crossing switching off is connected to a secondary side of the transformer. When a lead arm commutates, a refringence of a load current is blocked; the ZVS (zero voltage switching) is ensured; exciting current disappears; a lag arm realizes ZCS zero current commutating. The controlled inductance L K  assists to establish a corresponding load refringenced current and the exiting current and recovers electromagnetic induction; The RCD buffer circuit softens the reverse current of bridge rectifier and oscillations caused by the leakage inductance on secondary side of the transformer and the buffer capacitor are attenuated.

CROSS REFERENCE OF RELATED APPLICATION

This application claims priority under 35 U.S.C. 119(a-d) to CN 201710435216.4, filed Jun. 10, 2017.

BACKGROUND OF THE PRESENT INVENTION Field of Invention

The present invention relates to an ultra-high power ZVS+ZCS integrated soft switching DC/DC converter, and more particularly to an EV (electric vehicle) field. With the development EV industry, charger module no less than 30 KW with high efficiency, high reliability and ultra-high capacity is required for producing a conduction type DC fast charging pile. High power fast power electronic switch component IGBT (insulated gate bipolar transistor) and new high permeability material keep developing and the integrated controller and single chip microcomputer for DC/DC converter are fully developed, which are well prepared for developing the ultra-high capacity charger module. While adopting the new components and new material to produce new ultra-high capacity PWM phase shifted full bridge DC/DC converter for the charger module, a new technology of ZVS+ZCS integrated soft switch is developed. 30 KW charger module, 40 KW & 50 KW single-module mobile DC fast charging pile and multi-module ultra-high capacity electric bus DC fast charging pile are produced. The technology has far-reaching influence on the energy saving economy.

Description of Related Arts

The conventional phase shifted full bridge ZVS (zero voltage switching) DC/DC converter is shown as FIG. 1, which has two bridge arms. Each of the bridge arms adopts an IGBT module on which are two controlled switch tubes. The two bridge arms are parallel connected before connected to a three phase rectifier V_(s). Q₁ and Q₃ are on the lead arm; Q₄ and Q₂ are on the lag arm; Q₁, Q₂, Q₃ and Q₄ are four high capacity IGBT. Each IGBT comprises a collector, an emitter and a gate to constitute a voltage controlled switch. A built-in reverse diode D_(i) and a commutating capacitor C_(pi) (a sum of the built-in capacitor and the parallel connected capacitor, i=1, 2, 3, 4) are parallel connected to two ends of the switch. A transformer T₁ is cross connected in the middle of the two bridge arms. The transformer establishes an electromagnetic induction relation of “voltage ratio between the primary coil N₁ and the secondary coil N₂ is proportional to the turns; current ratio between the primary coil N₁ and the secondary coil N₂ is inverse proportional to the turns n=V₁/V₂=N₁/N₂, l/n=I₁/I₂=N₂/N₁” by absorbing the exciting current I_(m) to generate the main flux; wherein the energy is transferred. The induction corresponding to the main flux is an exciting induction L_(m) of the transformer. The magnetic flux generated by two coil currents I₁ and I₂, which passes through the coil N₁ alone and coil N₂ alone, is leakage flux. The corresponding inductance is leakage inductance L_(σ1) and L_(σ2). The variable-ratio of the transformer n=N₁/N₂=1 and an equivalent circuit is obtained for the convenience of analysis. The equivalent schema circuit of the phase shifted full bridge ZVS DC/DC converter is redrawn as FIG. 2. The gate of the two switch tube Q₁ and Q₃ on the lead arm and the two switch tube Q₄ and Q₂ on the lag arm are phase shifted trigger controlled by two pairs of pulses C, D and A, B with a phase difference of 180° and a phase angle of 180° respectively. In order to prevent a direct short-circuit fault while the two switch tubes on the same arm commutating, an adjustable dead time Δt_(cd) and Δt_(ab) are reserved during initial pulses. Once the circuit is started up, four pulses appears at the same time; wherein A and C are of the same phase; B and D are of the same phase; the transformer T₁ withstands a zero voltage. The phase of the lag arm pulses A and B are fixed; the phase of the lead arm pulses C and D are gradually moves backwards with the extending soft start time (the reason for why C, D are lead arm); the work phase angleα of the transformer T₁ while withstanding a voltage is gradually increasing; a +-alternating is induced on the secondary side; the energy feed to the secondary side by the gradually extending square wave voltage is increasing. The process is illustrated in FIG. 3. Referring to the topology of the multiple time division equivalent circuit illustrated in the FIG. 4, the working theory is described as below:

t₀˜t₁ is the energy transfer period. As illustrated in FIG. 3 and FIG. 4-1, an exciting current I_(m) flows through the transformer and an electromagnetic induction relation is established. D pulse moves backwards by a phase angle α relative to A pulse; Q₃ and Q₄ are triggered; the transformer withstands the phase angle of the power voltage; C_(P1) and C_(P2) are charged by the power supple V_(s); while the coil resistance and the leakage inductance are ignored, V_(XY)=V_(s)=V_(ST)=V_(m)=L_(F)dI₀/d_(t)+V₀, dI₀/dt=(V_(st)−V₀)/L_(F); the primary side current I₁=I₀′+I_(m)=(l/n)I₀+I_(m) (I₀: load current; I₀′=(l/n)I₀: the load current refringenced to the primary side; I_(m): the exciting current of the transformer).

t₁˜t₁+Δt_(cd) the circuit progresses to a commutating period and the lead arm commutates. As illustrated in FIG. 3, when t=t₁, the pulse D closes and Q₃ switches off. In the dead time period Δt_(cd), the inductance current I₁=(l/n) I₀+I_(m) does not change suddenly; the commutating capacitor C_(P3) of the Q₃ is charged; the voltage V_(Y)=1/C_(P3)∫I₁dt rises to conduct the built-in diode D₁ of the Q₁ and is embedded in V_(Y)=V_(S); the dead time Δt_(cd) ends; the pulse C triggers the switch tube Q₁ to realize ZVS voltage zero-crossing switch on; V_(XY)=0; the voltage applied on the primary coil N₁ of the transformer T₁ fulfills V_(ST)=V_(m)+V_(σ1)=V_(XY)−V_(σ1)=V_(σ1); the leakage inductance voltage disappears afterwards; the voltage applied on the transformer is zero; the exciting current I_(m)=0; the transformer lose the electromagnetic induction relation; the primary side current I₁=I₀′=(l/n) I₀.

t₁+Δt_(cd)˜t₂ is the primary side circulating current period. The current I₁=I₀′=(l/n) I₀ flows through D₁ inside the Q₁→lag arm switch tube Q₄→the primary coil N₁ of the transformer→the built-in diode D₁ of Q₁→forms the circulating current I₁. The circuit is equivalent to a r₁, L_(σ1) short circuit with a current I₁=(l/n) I₀ (r₁ is the resistance of the primary side coil N₁ of the transformer); Based on Kirchhoff's second law, the process forms a homogeneous differential equation 0=r₁I₁−L_(σ1)dI₁/dt which a resolved as below:

I₁=Ae^(r1t/) ^(L) ^(σ1), A=(l/n) I₀, the circulating current I₁=(l/n)I₀ e^(−r1t/) ^(L) ^(σ1) fulfills I′₀=(l/n)I₀ is the initial value; r₁/L_(σ1) is the attenuation coefficient; the circulating current extends to t₂ when the lag arm triggers the pulse A to switch off and the Q₄ switches off; As illustrated in FIG. 3, the circulating current extends to t₂+Δt_(ab).

The load current I₀ of the secondary side of the transformer flows as freewheeling of filter inductance L_(F); V₀=−L_(F)dI₀/dt and the slope dI₀/dt=−V₀/L_(F). The primary side current of the transformer is attenuated circulating current; the secondary side current of the transformer is the freewheeling of the filter inductance L_(F); no electromagnetic induction relation between the primary side current and the secondary side current.

t₂˜t₃ is the lag arm commutate period and the transformer reverse once. I₁ wave is illustrated in FIG. 3 and FIG. 4-3; when t₂, pulse A closes, Q₄ switches off; in the dead time Δt_(ab) period of the B pulse, the attenuated current I₁=(l/n) I₀ e^(−r1t/) ^(L) ^(σ1) charges the commutating capacitor C_(P4) of the Q₄; the voltage V_(X)=1/C_(P4)∫I₁dt decreases until the built-in Diode D₂ of the Q₂ is conducted and is embedded in V_(x)=0; the dead time ends; the triggering pulse B appears; the switch tube Q₂ realizes ZVS; Q₄→Q₂ commutation is completed; the transformer reverses once; the commutation is completed by using the energy (½) L_(σ1)I₁ ² of resonant between the leakage inductance L_(σ1) and the parallel connected capacitor C_(P4) to the switch component; the energy of leakage inductance L_(σ1) is limited and is not able to guarantee a full range of load ZVS. Both insufficient energy and exceeding energy force the switch tube to switch on or induce ringing, which increases switch loss; circuit: +V_(s)→Q₁→leakage inductance L_(σ1)→Q₂→−V_(S); Based on Kirchhoff's second law an equation emerges: power voltage V_(S)=r₁ I₁−L_(σ1)dI₁/dt, after commutate the diodes D₁ and D₂ are conducted first, the original circulating current I₁ are continuous; based on the rule of dI₁/dt=V_(S)/L_(σ1), as illustrated in FIG. 3, I₁ decreases to zero and then rises in a reverse direction until a load current refringenced is established I₁=I₀′=(l/n)I₀ before the exciting current I_(m) is absorbed and the electromagnetic induction relation recovers.

No matter the lag arm is ZVS voltage zero-crossing soft switch on or forced to switch on to commutate, the lag arm is work under the condition of that the exciting current I_(m)=0 and no electromagnetic inductance; in the work zone of the pulse B, the secondary side of the transformer works under no inductance voltage for a period which causes the voltage duty cycle loss on the secondary side. The stronger the load current I₀′ is, the stronger the leakage inductance L_(σ1) is and the bigger the duty cycle loss is. Referring to V_(XY) and I₁ illustrated in FIG. 3, FIG. 4-3 and FIG. 4-4, the duty cycle loss t²⁻³=Δt_(ab)+Δ_(α).

t₃˜t₄ is the next energy transfer period. The exciting current I_(m) is absorbed to recover the electromagnetic induction relation. While the coil resistance and the leakage inductance are ignored: V_(XY)=V_(S)=V_(ST)=L_(F)dI₀/dt+V₀; enters the next energy transfer period, dI₀/dt=(V_(st)−V₀)/L_(F).

The phase shifted full bridge ZVS DC/DC converter circuit has the below problems:

1. The lead arm commutation brings the circulating current which co-exists with the freewheeling on the secondary side of the transformer and cause extra loss; 2. the commutation of the lag arm is not able to realize ZVS voltage soft switch on within a wide load range, which increases the switch loss; 3. the duty cycle loss Δt_(ab)+Δα on the secondary side of the transformer is influenced by the leakage inductance L_(σ1) and the load and narrows the working range of the input voltage; 4. the high power switch tube switches off with a load and switches on with a voltage, which compromises the electromagnetic compatibility; The existing problems lead to low efficiency and unstable working condition. The capacity of a single module is not able to be further increased over 5 KW.

BRIEF SUMMARY OF THE INVENTION

The present invention modifies the conventional phase shifted full bridge ZVS (zero voltage switching) DC/DC converter to ensure a double soft switching function of voltage zero-crossing switch on and current zero-crossing switch off by ZVS+ZCS when the lead arm commutates and enters a commutation period. The present invention reverses the transformer by PWM switching frequency and the duty cycle to eliminate the circulating current on the primary side and ensures the primary voltage and the current are in phase according to the requirement of the loads. It also ensures DC voltage and DC current on the secondary side from the rectifier satisfies the needs of the load. Therefore, it achieves high efficiency and good electromagnetic compatibility.

A controlled saturation inductance L_(K)=L_(K1)+L_(K2) controlled by the load current I₀ is added on the primary side of the transformer and a RCD buffer circuit is added on the secondary side of the transformer. Either disconnecting Q₃ at positive half cycle or disconnecting Q₁ at negative half cycle will make the resonance of Lk and capacitor C_(p1) and C_(p3), then make the primary and secondary voltages of the transformer proportionally decrease. Meanwhile, the voltage of the buffer capacitor C_(s1) and C_(s2) does not change and the voltage of the rectifier diode is reverse bias to block the refringence of the load current to the primary side

$I_{0}^{\prime} = {{\frac{1}{n}I_{0}} = 0.}$ The circulating current is I₁=Ae^(−r1t/) ^(L) ^(σ1)+I_(m),

${A = {{\frac{1}{n}I_{0}} = 0}},$ so the initial value of the circulating current is I_(m). When the voltage drops to zero and the exciting current I_(m)=0, the primary side current is absolutely zero I₁=0. See FIG. 8-2. The lead arm is ZVS voltage zero-crossing switching on and the primary current will be zero for a period which is enough for the lag arm to be ZCS current zero-crossing switching off and commutation.

The secondary side filter inductance L_(f) and the filter capacitor C₁ enter freewheeling status as soon as the commutation period starts. I₀ flows to the load Z through the LC output filter circuit. I₀ flows on the secondary side only, the energy of the buffer capacitor C_(s1) and C_(s2) will be absorbed and the voltage will drop down to zero.

The transformer reverses with zero current. The power supply V_(s) is first applied on the controlled saturation inductance L_(K)=L_(K1)+L_(K2) controlled by the load current I₀, which assist the establishment of the load current refringenced

$I_{0}^{\prime} = {\frac{1}{n}{I_{0}.}}$ The inductance current keeps increasing until the exciting current I_(m) is established for the transformer and the electromagnetic induction relation recovers. The inducted voltage of the primary voltage V_(st) is applied on the secondary side coil N₂ and leakage inductance L_(σ2) of the transformer, then the rectifier, and then applied on C_(s1) R₂ and C_(s2) R₁. The reverse diode of the rectifier is soften by the capacitors C_(S1),C_(S2) and the attenuating oscillation circuit is established to ensure the seamless connection with the load current I₀ of the secondary side in the first oscillation period. The energy continues to transfer to the load through the transformer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a conventional phase shifted full bridge ZVS (zero voltage switching) DC/DC converter;

FIG. 2 is an equivalent schema circuit of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter;

FIG. 3 is a sequence diagram of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter, which comprises four IGBT trigger pulses A, B, C, D; node voltage V_(xy)=f(t) of two bridge arms; primary side current I₁=f(t) of a transformer; and load current I₀=f(t);

FIG. 4 is an illustration of topology of five time divisions of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter;

FIG. 4-1 is an illustration of the energy transfer period t₀˜t₁ of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter, when an electromagnetic induction relation is established and the energy is transferred normally;

FIG. 4-2 is an illustration of a commutation of the lead arm of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter;

FIG. 4-3 is an illustration of lag arm Q₄ switching off by using the energy ½L_(σ1)I₁ ² of resonant between the leakage inductance L_(σ1) and the parallel connected capacitor C_(P4) of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter;

FIG. 4-4 is an illustration of duty cycle loss caused by the commutation period t₂˜t₃ of the lag arm according to the circulating current changing slope of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter;

FIG. 4-5 is an illustration of the next energy transfer period of the conventional phase shifted full bridge ZVS DC/DC (zero voltage switching) converter, when the corresponding load current refringenced established and the transformer absorbs the exciting current Im to recover the electromagnetic induction relation.

FIG. 5 is a schematic diagram of an ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 6 is an equivalent schema circuit of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 7 is a sequence diagram of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter, which comprises four IGBT trigger pulses A, B, C, D; node voltage V_(xy)=f(t) of two bridge arms; primary side current I₁=f(t) of a transformer; and load current I₀=f(t);

FIG. 8 is an illustration of working theory of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter referring to topologies of four time division on the primary side and four time division on a secondary side;

FIG. 8-1 is an illustration of the energy transfer period to t₀˜t₁ of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter, when the electromagnetic induction relation is established and the energy is transferred normally;

FIG. 8-2 is an illustration of a commutation of the lead arm of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 8-3 is an illustration of the very short, almost zero, lag arm ZCS zero-current commutate period of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 8-4 is an illustration of the transformer absorbing the exciting current I_(m) to recover the electromagnetic induction relation and recover the energy transfer of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 8-5 is an illustration of the blocked secondary side rectifier and the reverse voltage of the buffer diode D₁₀ and D₁₁ decreasing of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 8-6 is an illustration of a parallel connection and discharging of capacitor C_(S1) and C_(S2) when the diode D₁₀ and D₁₁ are conducted of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 8-7 is an illustration of a secondary side freewheeling current I₀ of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter;

FIG. 8-8 is an illustration of the equivalent circuit of the DC voltage V_(ST) connecting to two attenuating oscillation circuits L_(σ2), C_(S1), R₂; L_(σ2), C_(S2), R₁, to release the deposited energy of leakage inductance L_(σ2) of the ultra-high power ZVS+ZCS integrated soft switching DC/DC converter.

DETAILED DESCRIPTION OF THE INVENTION

An object of the present invention is to provide the below solution to solve the existing problems of the phase shifted full bridge ZVS DC/DC converter circuit:

1 A nanocrystal high permeability ring magnetic core is adopted to produce the transformer T₁; the secondary side coil N₂ is winded on the inner side to reduce the leakage inductance L_(σ2); compared to the ferrite material, the magnetic flux density of the transformer designed is improved by 2.5 a times

2 A pair of EE type ferrite magnetic cores are added; work coil W₀₁, W₀₂ are winded inside of the two coil frame respectively, which are connected tail to tail on the primary side of the transformer; current I₁ flows through; And control coil W_(C1), W_(C2) are winded on the outside; a load current I₀ flows through head in and tail out; A pair of controlled saturation inductance L_(K)=L_(K1)+L_(K2) controlled by the load current I₀ are obtained; the primary side N₁ of the transformer T₁ is set between the work coil W₀₁ and W₀₂, as illustrated in FIG. 5

3 One RCD buffer circuit (C_(s1) C_(s2) R₁ R₂ D₉ D₁₀ D₁₁) in which the two capacitors (C_(s1) C_(s2)) are series connected through diode D₉ while charging and parallel connected through diodes D₁₀,D₁₁ while discharging is connected between the rectifier bridge D_(5\6\7\8) on the secondary side of the transformer and the filter inductance L_(F), and in which there are two resistances R₁,R₂ parallel connected to D₁₀,D₁₁ respectively, as illustrated in FIG. 5

4 Two switch tubes Q₄ and Q₂ on the lag arm works under the current zero-crossing switch off status; the commutating capacitor C_(P4) and C_(P2) connected outside is cancelled and the initial dead time Δt_(ab) of the trigger pulse A and B is approaching zero. The high power phase shifted full bridge ZVS+ZCS integrated soft switch DC/DC converter is illustrated as FIG. 5. The schematic is replaced by a transformer equivalent circuit to obtain an equivalent circuit as illustrated in FIG. 6. The waves of important detection points in the circuit are illustrated in FIG. 7. Referring to the multiple time division equivalent topologies illustrated in FIG. 8, the working theory are described as below:

t₀˜t₁ the energy transfer period; as illustrated in FIG. 7 and FIG. 8-1, the exciting current I_(m) flows through the transformer and the electromagnetic induction relation is established; Q₃ and Q₄ are conducted; power V_(s) charges the C_(P1) and C_(P2) (only built-in capacitor remains); the coil leakage resistance r₁, L_(σ1), r₂ and L_(σ2) are ignored; a pair of controlled saturation inductance L_(K1) and L_(K2) are on two sides of the exciting inductance L_(m), wherein V_(XY)=V_(s)=V_(LK1)+V_(ST)+V_(LK2)=V_(LK1)+V_(m)+V_(LK2)=V_(LK)+L_(F)dI₀/dt+V₀; the V_(LK) controlled by the load current I₀ is approaching zero and ignored; dI₀/dt=(V_(st)−V₀)/L_(F); the primary side current I₁=(l/n) I₀+I_(m) (I₀: load current; I′₀=1/nI₀: the load current refringenced to the primary side. I_(m): the exciting current of the transformer).

t₁˜t₁+Δt_(cd) is the lead arm commutates and the circuit enters a commutation period. As illustrated in FIG. 7 and FIG. 8-2, when t=t₁, the pulse D closes and Q₃ switches off; in the dead time Δt_(cd) period of the pulse C, a controlled saturation inductance L_(K)=L_(K1)+L_(K2) is added; energy ½L_(K)I₁ ² in the L_(K) causes itself and the capacitance C_(P3) to resonant, the voltage V_(Y) rises until the built-in diode D₁ is conducted the voltage is embedded in V_(Y)=V_(S). When t₁+Δt_(cd) dead time ends; the trigger pulse C appears; the switch tube Q₁ realizes ZVS voltage zero-crossing switch on; the ZVS soft switch of the lead arm remains. The primary voltage V_(ST)=V_(S)−(V_(LK1)+V_(LK2)) of the transformer rapidly decrease. The secondary side voltage changes proportionally with primary voltage because the existence of the electromagnetic induction relation; the self charging voltage of the buffer capacitor C_(S1) and C_(S2) comply with V_(CS1)+V_(CS2)=V_(St)/n; the reverse voltage of the diode D₁₀ and D₁₁ changes with the secondary side voltage; the capacitor C_(S1) and C_(S2) is parallel connected and discharging; As illustrated in FIG. 8-6, the current is based on I₀=C_(S1)dV_(ST)/dt and follows the rule dV_(ST)/dt=I₀/C_(S1), which becomes the freewheeling of the output filter L_(F) and discharging to the load as illustrated in FIG. 7. Due to C_(S1)>C_(P), the refringenced load current I₀ to the primary side is blocked while freewheeling as illustrated in FIG. 7 and FIG. 8-7. The work coil W₀₁ and W₀₂ of L_(K1) and L_(K2) are set beside two sides of the transformer primary side; When the lead arm commutation is completed, D₁ is conducted; V_(ST) drops to zero; the transformer exciting current disappears I_(m)=0; the primary side current of the transformer I₁=(l/n)I₀+I_(m)=0; the primary side circuit enters zero-current interval period referring to the current wave I₁ illustrated in FIG. 7 and FIG. 8-2.

The load current I₀ on the secondary side of the transformer works as the freewheeling current of the filter inductance L_(F) within the t₁−t₂ time period; V₀=−L_(F)dI₀/dt and the slope is dI₀/dt=−V₀/L_(F). During the time period, the primary side is in zero-current interval period and the current I₀ of the secondary side is the freewheeling current of L_(F).

t₂˜t₃ is the lag arm ZCS zero-current commutate period. As illustrated in FIG. 7, the pulse A closes at t₂ and pulse B appears almost at the same time (Δt_(cd)=0.4 us); the transformer completes a reverse of an extremely short delay under the zero-current status. The power voltage V_(S) is applied on the controlled inductance L_(k)=L_(K1)+L_(K2) as illustrated in FIG. 8-3. Based on the rule V_(S)=L_(K)dI₁/dt, dI₁/dt=−V_(S)/L_(K) and the change rate of the current I₁ is V_(S)/L_(K). The controlled saturation inductance L_(K)=f(I₀) controlled by the load current I₀ is obtained by selecting the ampere-turns ratio (WC1I0/W01I1) of the control winding and work winding for the controlled saturation inductance L_(K). As illustrated in chart 1, starting from zero, the slope is controlled by the controlled inductance L_(k), which is the slope is controlled by the load current I₀. The corresponding load current refringenced is I₁=I₀′=(l/n)I₀ as illustrated in FIG. 7 current wave I₁, t₂−t₃ section. The circuit is illustrated in FIG. 8-3.

Chart 1. the controlled saturation inductance L_(k)=f (I₀) controlled by the load current I₀

I₀(A) 0 21.5 39 51 66.9 76 L_(k) (uh) 30 22.8 11.7 4.0 2.7 2.0

t₃˜t₄ the transformer absorbs the exciting current I_(m) to recover the electromagnetic induction relation between the primary side and the secondary side of the transformer. The corresponding load current refringenced established by the controlled saturation inductance L_(K) enters the secondary side and charges the series connected buffer capacitors C_(S1) and C_(S2). The voltage V_(ST) on the secondary side is applied on the oscillating circuit of the leakage inductance L_(σ2) and the series connected buffer capacitor C_(S1) and C_(S2). In order to eliminate the oscillation, buffer resistance R₁ and R₂ are parallel connected besides the reverse diode D₁₀ and D₁₁ to absorb the deposited energy of the leakage inductance L_(σ2). The equivalent circuit is illustrated in FIG. 8-4 and FIG. 8-8, which is equivalent to a circuit where the DC voltage V_(ST) is connected to two attenuating oscillation circuits L_(σ2), C_(S1), R₂, L_(σ2), C_(S2), R₁. The secondary side coil N₂ of the transformer is required to set inside to reduce the leakage inductance L_(σ2) and the deposited energy, which reduces the energy consumption of the resistance R₁ and R₂ and ensures a seamless connection between the primary current and the output filter L_(F) freewheeling current; the circuit enters the energy transfer period.

t₄˜t₅ enters the next energy transfer period. As illustrated in FIG. 8-4, V_(XY)=V_(S)=V_(ST)=V_(LK)+L_(F)dI₀/dt+V₀. V_(LK) is approaching zero when the load is rather big and dI₀/dt=(V_(st)−V₀)/L_(F); A current charges the buffer capacitor C_(S1) and C_(S2) through the resistant R₂ and R₁. As illustrated in FIG. 7, the current wave I₁ is a sine wave before becomes a flat wave shown by a dotted line the slope of which is approaching zero.

A smart charger KCG-120 A/E264V-3G is successfully developed by adopting the present invention of high power phase shifted full bridge ZVS+ZCS integrate soft switch DC/DC converter, which is use as the power supply charger for beacon light on an island. The working frequency is 25 KHZ; the output power is 31.8 KW; the rated voltage and current are 264V and 120 A respectively; the input voltage is 3Φ380 VAC.

The BYC-30X series charging pile produced by the Tianjin Beiyang electric Co., Ltd. adopts the present invention, which are 30 KW charging modules supporting the ultra-high capacity DC fast charging pile for electric vehicle and electric bus. The present invention has a promising future for application on single vehicle, single module 40 KW, 50 KW mobile DC fast charging pile.

Datasheet of the load experimental efficiency of the 30 KW DC/DC converter module

V_(out)(VCD) volts 387 380.5 382 380.5 380 381 I_(out)(ADC) ampere 5.4 66.2 68.7 71 71.3 77.9 V_(in)(VDC)volts 576 530 542 539 545 538 I_(in) (ADC) ampere 5.2 49.8 51.6 53.4 53.6 58.6 η = (V_(out)*I_(out))/(V_(in)*I_(in)) 70% 95.5% 93.8% 93.7% 92.7% 94.3% (%) efficiency

The above chart is the efficiency datasheet tested by 30 KW DC/DC converter module load experiment. The highest efficiency is 95.5%; the temperature rise of the lead arm IGBT switch tube is 35° C. under air cooling. 

What is claimed is:
 1. An ultra-high power ZVS+ZCS integrated soft switching DC/DC converter, comprising a phase-shifted full bridge ZVS (zero voltage switching) DC/DC converter wherein two series controlled tubes (Q₁, Q₃) on a lead arm and two series controlled tubes (Q₄, Q₂) on a lag arm are parallel connected and then Q₁,Q₃ and Q₄,Q₂ are connected to an DC power; wherein each of the switch tubes comprises a controlled switch, a built-in diode and a built-in capacitor reverse cross-connected on two ends of the controlled switch, wherein a controlled saturation inductance (L_(k)) controlled by a load current and a high permeability material ring transformer (T₁) are series connected in two middles of the controlled switch tubes on the lead arm and the lag arm; wherein a RCD (residual-current device) buffer circuit (C_(s1) C_(s2) R₁ R₂ D₉ D₁₀ D₁₁) for ZCS (zero current switch) current zero-crossing switching off is connected between a bridge rectifier circuit (D₅ D₆ D₇ D₈) and an output filter inductance (L_(f)).
 2. The DC/DC converter, as recited in claim 1, wherein the controlled saturation inductance (L_(k)) adopts high permeability material as a magnetic core; the controlled saturation inductance (L_(k)) is divided into a first saturation inductance (L_(k1)) and a second saturation inductance (L_(k2)) under a control of an output load current (I₀); the first saturation inductance (L_(k1)) and the second saturation inductance (L_(k2)) constitute an integrate controlled saturation inductance (L_(k)=L_(k1)+L_(k2)).
 3. The DC/DC converter, as recited in claim 2, wherein the controlled saturation inductance (L_(k)) comprises two pairs of high permeability magnetic cores with saturation magnetization curve and an adjustable air gap; two work coils (W_(O1)=W_(O2)) set in inner layer and two control coils (W_(C1)=W_(C2)) set in outer layer are wound up on two coil frames respectively; wherein the two work coils are reverse series connected head to tail-tail to head, through which a work current (I₁) flows; the two control coils are forward series connected head to tail-head to tail, through which a load current (I₀) flows; or the two work coils are forward series connected head to tail-head to tail, through which a primary current (I₁) flows; the two control coils are reverse series connected head to tail-tail to head, through which the load current (I₀) flows; the control coil and the work coil are set according to a certain ampere-turns ratio W_(C1)I₀/W₀₁I₁=W_(C2)I₀/W₀₂I₁≥1.5.
 4. The DC/DC converter, as recited in claim 1, wherein the high permeability material ring transformer (T₁) comprises a high permeability ring magnetic core; a secondary winding is set near to an inner layer of the high permeability magnetic core.
 5. The DC/DC converter, as recited in claim 1, wherein the RCD buffer circuit, first diode (D₉) is series connected between the two buffer capacitors (C_(S1),C_(S2)) and then they (C_(S1), D₉, C_(S2)) are cross connected to two output ends of a bridge rectifier circuit (D₅ D₆ D₇ D₈); a positive electrode of a second diode (D₁₀) is connected to an output end (“−)” of the bridge rectifier circuit; a negative electrode of the second diode (D₁₀) is connected to a node of a first capacitor (C_(S1)) and the first diode (D₉); a negative electrode of a third diode (D₁₁) is connected to an output end (“+)” of the bridge rectifier circuit; a positive electrode of the third diode (D₁₁) is connected to a node of a second capacitor (C_(S2)) and the first diode (D₉); wherein a first resistance (R₁) is parallel connected to the second diode (D₁₀); a second resistance (R₂) is parallel connected to the third diode (D₁₁).
 6. The DC/DC converter, as recited in claim 1, comprising the RCD buffer circuit wherein the two buffer capacitors (C_(S1), C_(S2)) need C_(S1)=C_(S2)>n²*C_(pi) (n=N₁/N₂, i=1,3, C_(pi): a sum of the built-in capacitors of the two controlled switch tubes on the lead arm of primary side of the transformer and two parallel connected commutating resonant capacitors).
 7. The DC/DC converter, as recited in claim 1, wherein the two controlled switch tube (Q₂ Q₄) on the lag arm do not parallel connect a commutating resonant capacitor; a dead time Δt_(AB) of trigger pulses A, B of the two controlled switch tubes is approaching zero and is not less 0.4 us. 